The present invention relates to the formation of conductive contacts in the fabrication of semiconductor integrated circuits. More particularly, this invention relates to a process for forming a less than 10 nm diffusion barrier with a flat interface, which gives good electrical contact to a shallow junction.
The continuing increase in semiconductor device circuit speed and density has been accompanied both by a decrease in the vertical dimensions of devices and by a need for reliable dense wiring. The decrease in vertical dimension has produced shallower device junctions.
In the processing of integrated circuits, individual devices, which are comprised of silicon, are connected into circuits by subsequent metal layers. Great care must be given to the metal-to-silicon interface, because the metal-silicon junction is prone to certain problems that require process attention. Two such problems are high-ohmic connections, which may electrically look like open circuits, and poisoning of the device by the contacting metal.
In manufacturing an interconnect, a contact hole is formed in an insulating layer, typically silicon dioxide, to expose the underlying semiconductor substrate, typically an N+ region set in a Pxe2x88x92 well, or a P+ region set in an Nxe2x88x92 well. To form the interconnect, the appropriate metal is deposited in the contact hole by standard techniques. If the metal is placed in direct contact with the semiconductor substrate, the metal can diffuse into the semiconductor during subsequent processing of the device, especially at temperatures above 400xc2x0 C., which are encountered during device packaging.
Metal silicides are typically used to provide good ohmic contact to device junctions. Titanium silicide (TiSi2) has become the most widely used silicide for self-aligned silicide applications in the ultra large scale integration (ULSI) industry because of its low resistivity, its ability to self-align, and its relatively good thermal stability. Titanium is deposited into the contact hole by standard deposition techniques. Titanium silicide is formed by subsequently heating the substrate and metal to about 500xc2x0 C. to 700xc2x0 C.
To minimize junction leakage, the device junction must be kept below the silicide. The distance between the device junction and the silicide is determined by the amount of metal deposited in the contact hole, the amount of silicon consumed during heating, and the planarity of the reaction front during heating. The amount of silicon consumed is determined by the stoichiometry and crystal structure of the silicide formed as well as by the anneal time and anneal temperature. For titanium silicide, the molar ratio of metal to silicon is two to one. The planarity of the silicide reaction front is controlled by many variables, such as the cleanliness of the silicon surface before metal deposition and the reaction temperature. Typical semiconductor fabrication sequences produce non-planar, cusped reaction fronts. Junction depths could be made shallower by using a silicide process that produced a more nearly planar reaction front.
To prevent diffusion, many semiconductor fabrication sequences use a diffusion barrier between the metal and the silicon substrate. In a common process sequence, titanium nitride (TiN) is used as a barrier against attack by tungsten hexafluoride and by fluorine during the deposition of tungsten, a commonly used conductive material, by chemical vapor deposition from tungsten hexafluoride. A preferred process for forming the titanium nitride barrier includes conducting the silicide-forming reaction in a nitrogen-containing atmosphere, such as nitrogen gas, ammonia vapor, or forming gas. Titanium nitride is formed at the same time as titanium silicide.
The topography of the resulting interface between the titanium oxynitride and titanium silicide limits the usefulness of this process in the development of smaller shallow junction devices. The process involves competing reactions in a very narrow region: formation of TiOyNz from above and formation of TiSi2 from below. Thus it is difficult to control the layer thickness of the bilayer, and the titanium oxynitride layer is typically nitrogen deficient. Formation of the titanium silicide layer consumes silicon from the substrate and the layer can be cusped.
The rough interface between titanium silicide and titanium oxynitride makes the titanium oxynitride layer an unreliable barrier against attack during the chemical vapor deposition of tungsten. Penetration of tungsten hexafluoride through the narrow part of the titanium oxynitride layer can lead to tungsten encroachment and ruin the device. Although the barrier properties of the layer can be improved by incorporation of oxygen during deposition of the titanium and the subsequent anneal, the non-uniformity in thickness of the TiOyNz layer, which degrades its effectiveness as a barrier, remains a problem.
Diffusion produces spiking of the metal into the semiconductor. Spiking typically extends for less than about 0.5 micron into the semiconductor, and thus is not a particular problem when the device is greater than 0.5 micron thick. For high density circuits in which the device is less than 0.5 micron thick, however, spiking can short the metal to the underlying Pxe2x88x92 well or Nxe2x88x92 well, rendering the device inoperative.
In addition, the TiSi2 made by this process is formed as small grains, so that a large number of grain boundaries are created. Grain boundaries can permit diffusion of device-poisoning metal impurities to the silicon substrate. Such diffusion is especially a problem with shallow junction devices, which are more easily poisoned by low concentrations of metal impurities. Therefore, a TiSi2 layer made up of large grains is desirable to reduce diffusion of metal impurities.
Thus, a need exists for a process for forming a barrier layer and a silicide layer in which (1) the interface formed between the silicide layer and the silicon substrate is a flat interface; (2) the barrier layer is uniform in thickness; and (3) the barrier layer material has large grains so that metal impurity diffusion is reduced. In addition, the process should be simple and cost effective, should readily integrate into the procedures currently used to form semiconductor devices, and preferably, should not introduce additional processing steps.
To meet these and other needs, and in view of its purposes, the present invention provides a process for forming a semiconductor device with electrical. interconnections that have low contact resistance and for forming a barrier layer that prevents undesired diffusion into the silicon substrate. The process comprises:
a) depositing a layer of niobium and titanium with a thickness of less than 10 nm on a silicon substrate, with the amount of niobium present in the layer not exceeding 20 atomic percent of the total amount of niobium and titanium present in the layer;
b) annealing the substrate and layer in a nitrogen-containing atmosphere at about 500xc2x0 C. to about 700xc2x0 C.; and
c) depositing a conductive material on the layer.
The process produces a much flatter interface between the suicides and the silicon substrate than is produced when undoped titanium is used. The flat interface is critical for contacts for very small devices and shallow junctions, such as are required for ULSI shallow junctions.
A uniform barrier layer of (Ti,Nb)OyNz is formed. This layer is a better barrier against attack by tungsten hexafluoride and fluorine during the chemical vapor deposition of tungsten than conventional barriers.
Although not bound by any explanation or theory, it is believed that a better impurity diffusion barrier is produced because (Ti,Nb)Six grains are larger than TiSix grains. Larger grains have fewer grain boundaries and it is well known that the grain boundary diffusion rate of an impurity is several orders of magnitude larger than the bulk diffusion rate; therefore, larger grains produce better impurity diffusion barrier. An efficient impurity diffusion barrier is critical in the production of semiconductor devices, especially for shallow junction devices in which the requirement for impurity control is much higher than for other devices. This feature is important for the development of future devices, in which, due to the smaller size of the device, better control of impurity diffusion will be required.
In another embodiment, the invention is a contact in which the interface between the silicon substrate and its adjacent layer is flat. A flat interface is important for a device contact, such as in a shallow junction device contact. It is to be understood that both the foregoing general description and the following detailed description are exemplary, but are not restrictive, of the invention.